1. Field of the Invention
This invention relates to a power supply control circuit for use in an IC memory card having a battery backup function.
2. Description of the Related Art
FIG. 10 is a block diagram of a power supply control circuit of a conventional IC memory card capable of battery backup. An external power supply voltage V.sub.cc from an external unit (not shown) applied between an external power supply voltage terminal 1 and a ground terminal 2 is divided by a pair of voltage dividing resistors 3a and 3b to be supplied to an inverting input terminal of a comparator 4 for detecting a memory protection voltage and is also divided by another pair of voltage dividing resistors 3c and 3d to be supplied to an inverting input terminal of a comparator 5 for detecting a power supply changing voltage. Reference voltages from a reference voltage generation circuit 6 are supplied to non-inverting input terminals of the comparators 4 and 5. A memory protection signal generation circuit 7 generates a memory protection signal according to an output from the comparator 4 and outputs the signal through its memory protection signal output terminal 8. A power supply changing PMOS transistor 9 is switched by an output from the comparator 5. A terminal 10 is an internal voltage output terminal and a terminal 11 is a backup battery connection terminal to which a backup battery (not shown) incorporated in the card is connected. A Schottky diode 12 for preventing a reverse current to the battery and a current limiting resistor 13 are provided. The internal voltage output terminal 10 and the memory protection signal output terminal 8 are connected to an internal circuit (not shown) including a memory device. Lines 1a and 10a represent an external power supply line and an internal power supply line, respectively. Each of the comparators 4 and 5 generates an outputs in accordance with the result of comparison between the reference voltage from the reference voltage generation circuit 6 and the detected voltage from the voltage dividing resistors 3a and 3b or 3c and 3d. Each of the comparators 4 and 5 has a hysteresis such that a voltage at which the output is inverted from a lower level to a high level is different from a voltage at which the output is inverted from the high level to the low level.
The operation of this control circuit will be described below. In a backup state, the power supply changing PMOS transistor 9 is off (non-conductive state) and the voltage of the battery connected to the battery connection terminal 11 is supplied through the diode 12 and the resistor 13 and output through the internal voltage output terminal 10 to back up the internal circuit. If the card is connected to the external unit to apply the external power supply voltage V.sub.cc and if the voltage V.sub.cc becomes equal to a power supply changing voltage V.sub.s1 (+) in a voltage rising state, the output from the power supply changing voltage detection comparator 5 is inverted to turn on the transistor 9 (conductive state), whereby a voltage obtained by subtracting a drop voltage due to the on-resistance of the transistor 9 from the voltage applied to the external power supply voltage terminal 1 is output through the internal voltage output terminal 10. If a memory protection voltage V.sub.s2 (+) at which the memory is to be released from the protected state is reached by a further increase in the voltage V.sub.cc, the output from the memory protection voltage detection comparator 4 is inverted and the memory protection signal generation circuit 7 generates a signal to release the memory from the protected state. This signal is output through the memory protection signal output terminal 8 to change the internal circuit from a standby state into an accessible state.
Conversely, if the external power supply voltage V.sub.cc drops to a memory protection voltage V.sub.s2 (-) at which memory protection is necessitated, the output from the comparator 4 is inverted and the memory protection signal generation circuit 7 generates the memory protection signal. This signal is output through the memory protection signal output terminal 8 to set the internal circuit in the standby state (protected state). If the voltage V.sub.cc further drops to a power supply changing voltage V.sub.s1 (-) in a voltage dropping state, the output from the comparator 5 is inverted to turn off the transistor 9. The internal circuit is thereby set again to the state of being backed-up by the battery. The values of the power supply changing voltages V.sub.s1 (+) and V.sub.s1 (-) in the voltage rising state and the voltage dropping state are different from each other. Also, the memory protection voltages V.sub.s2 (+) and V.sub.s2 (-) in the voltage rising state and the voltage dropping state are different from each other.
If the thus-constructed conventional IC memory card power supply control circuit capable of battery backup is applied to a dual voltage operation system ensuring operation in two power supply voltage ranges at 3.3 V and 5 V (for example, the range of 3.3 V .+-.5% and the range of 5 V .+-.5%), it is difficult to protect the memory device in the internal circuit during a shifting period between 3.3 V and 5 V in which the operation is not ensured, because only one memory protection voltage can be set. There is therefore a possibility of destruction of data stored in the memory device when the power supply voltage is within such a voltage range.